Event Dime
Code size: Closing the gap between RISC-V and Arm for embedded applications
Events
- When:
- December 3, 2020 · 5:23 PM
- Where:
- SEGGER – Software development tools for embedded systems, NC
- Source:
- SEGGER – Software development tools for embedded systems
One of the challenges for RISC-V developers is that the code density of the RISC-V instruction set for deeply embedded processors does not match that of Cortex-M with existing tools. That’s just changed thanks to SEGGER’s innovations.