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SEGGER announces J-Link support for Espressif ESP32 devices with RISC-V cores

Name: SEGGER announces J-Link support for Espressif ESP32 devices with RISC-V cores
Start: 2024-10-10T09:24
End: 2024-10-10T09:24
Location: Local events

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When:: October 10, 2024 · 9:24 AM
Source:: SEGGER – Software development tools for embedded systems

As of version 8.10, SEGGER’s J-Link debug probes offer full support for Espressif ESP32 devices with RISC-V cores.

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